CS/EE 5504 Computer and Network Architecture

 

Instructor:    Chang-Tien Lu                                          

Office:   NVC Room 430

Tel:       703-538-8373

Email:            ctlu@cs.vt.edu

Office Hour:  Wed 5-6PM, Thursday 4-6PM, or by appointment.

Class Time and Location:      Thursday 4-7PM  NVC 214

 

 

Course Description:


            This course covers advanced computer architecture. Most of the course material discusses methods of increasing the throughput and decreasing the execution time of numeric computations. Computer architects have traditionally depended on intuition and experiences from past architectures to guide design of new architectures. A more recent trend in architecture is to use quantitative design, based on extensive measurement of existing programs. However, very little "theory" underlies architecture. Consequently the course is a survey of techniques for achieving high performance: pipelining, vector processing, and multiprocessing. Each topic will be presented through a discussion of basic principles, augmented with case studies of commercial architectures.

 

Text Book (required):

 

Computer Architecture: A Quantitative Approach

-         By John Hennessy and David Patterson.

-         Available in the Book Store

 

Reference Book

 

Computer Organization and Architecture: Design for Performance, Fifth Edition

-         By William Stallings

-         Available on amazon.com

 

Computer Organization and Design: The Hardware/Software Interface, Second Edition

-         By John Hennessy and David Patterson

-         Available on Morgan Kaufmann Publishers (mkp.com)

 

Prerequisite:


                The equivalent of CS 4504 Computer Organization is a prerequisite. Therefore you should be familiar with virtual memory; multiprogramming; assembly language; microprogramming; basic memory, processor, and I/O subsystem organizations; RISC and CISC architectures; and basic knowledge of digital logic and bus organizations. You are responsible for determining if you have satisfied the prerequisite. 

 

Tentative Schedule:

 

                The schedule indicates the concepts and material to be covered in each week under the column labeled "Topics". Mid-term examinations will take at first half of a meeting in designated weeks. Other half in those meetings may be used for discussions.

 

Week Date Lecture Topics Read Due Feedback
1 8/29 Introduction, Class overview, Basic Computer Organization. Ch.1    
2 9/5 Instruction Set Architecture and Design Issues Ch.2    
3 9/12 Pipelining and Design Issues Ch.3 HW1  
4 9/19 Instruction-Level Parallelism Ch.3   HW1
5 9/26 Prediction and Dynamic Exploitation Ch.3,4    
6 10/3 Exploiting ILP with Software Appraaches Ch.4 HW2  
7 10/10 Exam and review   Mid HW2
8 10/17 Cache and Memory Hierarchy Ch.5   Mid
9 10/24 Advanced Memory Architecture Ch.5  
10 10/31 Virtual Memory & Storage Subsystem Ch.5,7    
11 11/7 Storage Subsystem & Interconnection Networks and Clusters Ch.7,8 HW3  
12 11/14 Interconnection Networks and Clusters Ch.8   HW3
13 11/21 Multithreaded CPUs and Multiprocessor Ch.6 HW4  
14 11/28 Thanksgiving Holiday
15 12/5 Multiprocessor and Final Review Ch. 6   HW4
16
12/18
Final Exam 7-10PM   Final   



Examinations and Assignments:

 

           There are 4 homework assignments. Homework assignments are due at the start of class. If you have an excused absence from a class, turn in the homework assignment prior to the class session. All assignments must have your name, student ID and course name/ number. 

            The weighting scheme used for grading is: Midterm exams - 30%, Final exam - 40%, Assignments - 30%. Students are responsible for all material covered in lectures. Examinations will heavily emphasize conceptual understanding of the material.

Late Submission Policy: 

 

              Assignments must be handed in at the beginning of the class on the specified due date (Thursday of designated week). Late homework should be submitted to my office on paper. A penalty of 30% will be deducted from your score for the first 24-hour period your assignment is late. A penalty of 70% will be deducted from your score for >= 24-hour period. Weekend days will be counted. For assignments, you are encouraged to type your answers. 



Honor System: 

 

            All work is to be done under the provisions of the Virginia Tech Honor System. Students can discuss the interpretation of an assignment, however, the actual solution to problems must be one's own. Whenever I learn that a student has violated the honor code, I am obligated to report the violation.


Helpful Comments: 

 

            This class is Very Interesting and useful. To get full benefit out of the class you have to work regularly. Read the textbook regularly and start working on the assignments soon after they are handed out. Plan to spend at least 10 hrs a week on this class doing assignments or reading. 

Good Luck, and Welcome to CS 5504!
Chang-Tien Lu